MinkiJo / Zynq-DigitalClock

Simple DigitalClock using Xilinx Zynq Series

Geek Repo

Github PK Tool

Zynq-DigitalClock

Simple DigitalClock using Xilinx Zynq Series

FPGA uses just PL RTL Level Code

SoC uses both PS, PL

Target Board : RPS z7020 TK

Zynq Architecture

About

Simple DigitalClock using Xilinx Zynq Series

Languages

Language:VHDL 70.6%Language:Verilog 13.8%Language:C 6.9%Language:HTML 3.7%Language:V 2.0%Language:SystemVerilog 1.8%Language:Tcl 0.4%Language:JavaScript 0.2%Language:SuperCollider 0.2%Language:Assembly 0.2%Language:Shell 0.1%Language:Makefile 0.1%Language:CartoCSS 0.0%Language:Batchfile 0.0%Language:Pascal 0.0%Language:Python 0.0%Language:PureBasic 0.0%Language:C++ 0.0%