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Marcus-Charles

Marcus-Charles

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biriscv

32-bit Superscalar RISC-V CPU

Language:VerilogLicense:Apache-2.0Stargazers:838Issues:0Issues:0

Zhulong-RISCV-CPU

CPU Design Based on RISCV ISA

Language:VerilogLicense:MITStargazers:70Issues:0Issues:0

CNN-FPGA

Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

Language:VerilogStargazers:354Issues:0Issues:0

verilog_mnist

run mnist with verilog

Language:VerilogStargazers:4Issues:0Issues:0

free-programming-books-zh_CN

:books: 免费的计算机编程类中文书籍，欢迎投稿

License:GPL-3.0Stargazers:111143Issues:0Issues:0