Jitesh Nayak's repositories
router_placement
predicting router position by analyzing wlan throughput
SocketFileXfer
a file transfer cli to share files b/w two devices using socket programming
arm-soc-design-labs
lab files for arm soc design course
deep-detect
a deepfake detector usign the cnn and lstm architecture
dotfiles
dotfiles recovery
genocall
capstone project stuff
HDL_PRACTICE
contains simple basic block implementation in various hdl's
JiteshNayak2004
Config files for my GitHub profile.
HLS
compilation of learnings on HLS from various resources via vitis
JFPU
floating point unit following the IEEE 754 standard
JiteshNayak2004.github.io
personal website
PD_ASIC
this is a repo that contains the notes and lab assignments for physical design for ASIC course
PD_OPENLANE
rtl to gds flow using openlane
pygamett
pygame tutorials following corey schafer
RTL_Notes
Notes I made on RTL design and verification. Currently has verilog, system verilog and formal verification notes
RVXcellerate
single cycle risc-v core implementation
silent_room-hack
grc files for gnu radio used in the silent room hackathon
SV_tutorials
SystemVerilog Tutorial
SYNAPSE_PROJ
Detecting real time violence using computer vision and ml
SystemVerilog-Playground
Various basic topics for SystemVerilog Modules
WORD-RUSH
an addictive mini game inspired from wordle