Xilinx provides some new FPGA boards (Alveo U280 & Alveo U50) equipment with emerging memory technology called HBM. However, the leverage of this recent memory faces some challenges. The primer difficulty is the inadequate bandwidth utilization. In this project, I want to find a solution to deploy the irregular tasks (graph processing) on the U280 board. At the same time, obtain better performance as possible.
Platform: Alveo U280 Algorithm: BFS Evaluation index： Performance， HBM's bandwidth utilization. Additional observation indicators (Possible): the performance variation of the PCs utilization. Output: Performance measurement parameters
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