HGL's repositories
chisel-book
Digital Design with Chisel
Language:TeX000
chisel-lab
Lab exercises for Chisel in the digital electronics 2 course at DTU
Language:ScalaBSD-2-Clause000
CommunicationOnOpenCV
This repo provides basic communication functions based on OpenCV framework.
Language:Jupyter Notebook000
DAFIP
Digital ASIC FPGA IP examples
Language:C++000
MIPSCPU
Classic CPU pipeline implementation. ISA: MIPS32Rel1
Language:SystemVerilog000
Language:SystemVerilog000
MyRocketchip
an affable rocketchip
Language:Verilog000