The present evidence consists of the simulation of 4 hardware components programmed in VHDL (Very High-Speed Integrated Circuit Language) using the Hardware Simulator tool provided by the Nand2Tetris computer principles course.
It is worth mentioning that the VHDL specified in this course is a very simplified version of the standard implementations, so it may allow a better understanding if the reader is not familiar with programming languages.
The hardware components to be simulated are the following:
- Multiplexer with 2 inputs of 8 bits each.
- 4 to 16 decoder (1 input of 4 bits and 1 output of 16 bits)
- 16 to 4 Encoder (1 input of 16 bits and 1 output of 4 bits)
- 8-bit ALU (Arithmetic Logic Unit) that performs ADD, SUBTRACT, AND and OR (Logic) operations.