JPark's repositories
SimplePipelineCore
Developing an microarchitecture implementing addtional path for branching & jump operation. This digital design is going to be developed and simulated with systemverilog. It is going to be emulated on a PYNQ Z2 and Genesys 2 FPGA board.
CortexM-Sensors
This program is written in C. a TI launch pad(tm4c123gh6pm), temperature sensor (TMP 36GZ), ultrasonic sensor(HC-SR04), and bluetooth module(HC-05)
Language:HTML000
RingOscVirtuoso
A 3-stage inverter ring oscillator on Cadence Virtuoso
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SimpleProcessor
This is a 16-bit simple processor written in Systemverilog. Please check SimpleProject.docx to see each module's detail.
Language:SystemVerilog000