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EliasVansteenkiste / EvaluationFramework

Vivado scripts for the measuring the divide between academic and commercial FPGA CAD flows

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Evaluation framework

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Vivado scripts for the measuring the divide between academic and commercial FPGA CAD flows

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Language:VHDL 57.7%Language:Verilog 35.6%Language:SystemVerilog 3.4%Language:Tcl 1.7%Language:1C Enterprise 1.5%Language:Python 0.2%Language:Pascal 0.0%