Zhongtian Pan's repositories
Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm
The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm
The Dark Channel Prior technique is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
AXIS-AXI4-AXIS
This project is designed to delay the output of the video stream in AXI-STREAM format.
Chaotic-Carrier-Wave-System-Based-on-FPGA
The frequency of the goal wave is dictated by the value of the logistic value in this chaotic carrier wave system, which is based on fpga design.
serial_port_router
this's a simple case of different bound rate serial port router