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ClubieDong / MIPS-CPU

5-stage pipelined 32-bit MIPS CPU, supporting 57 kinds of instructions and 7 kinds of exceptions.

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MIPS-CPU

5-stage pipelined 32-bit MIPS CPU, supporting 57 kinds of instructions and 7 kinds of exceptions.

计算机组成原理课程设计
通过龙芯杯的全部89个测试点

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5-stage pipelined 32-bit MIPS CPU, supporting 57 kinds of instructions and 7 kinds of exceptions.

License:MIT License

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Language:Verilog 92.8%Language:Python 7.2%