This repository contains FPGA accelerators for the spaito-temporal HOTS: A Hierarchy of Event-Based Time-Surfaces for Pattern Recognition and spatial-only k-means feature-extraction algorithms. Designed using Intel's FPGA framework for oneAPI and SYCL. Implemented on Intel Programmable Acceleration Cards - Stratix 10 FPGAs (D5005).
More details about the accelerator architectures can be found at:
- Clustering Classification on FPGAs for Neuromorphic Feature Extraction
- Exploring ML-Oriented Hardware for Accelerated and Scalable Feature Extraction
The included files are intended for use with Intel's DevCloud Platform for oneAPI. Designs have been successfully synthesized and tested on Stratix 10 FPGA nodes using Intel(R) oneAPI DPC++/C++ Compiler 2024.0.1.
The oneapi-*-c.sh scripts contain instructions on how to CPU simulate, FPGA emulate, and FPGA compile for both algorithms, where * is either hots or kmeans. Pretrained models are included for both algorithms, as well as testing samples for validation. Datasets should be placed in the data subdirectory and the double-buffering variants should be used for optimized streaming performance.
Both algorithms are by default configured using 100 events per object and 64 final features -- included models' training parameters. The included HOTS model is expecting N-MNIST data (data source = 0) and the inlcuded kmeans model is expecting VGA data (data source = 1).
The CPU simulation and FPGA emulation for HOTS will occasionally result in segmentation faults or incorrect output. Most of the time, the simulation/emulation should pass.
Please use the following citation when referencing this material:
L. Kljucaric and A. D. George, "Clustering Classification on FPGAs for Neuromorphic Feature Extraction," 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Marina Del Rey, CA, USA, 2023, doi: 10.1109/FCCM57271.2023.00051
This research was supported by SHREC industry and agency members and by the IUCRC Program of the National Science Foundation under Grant No. CNS-1738783. (University of Pittsburgh and Intel Corp.)
Copyright (c) 2024 NSF Center for Space, High-performance, and Resilient Computing (SHREC) University of Pittsburgh. All rights reserved.
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