Bill Nace's repositories
Build-18-FPGATetris
We will build Tetris using logic design concepts (Hardware threads, 18-240 Lab 3b) on an Altera FPGA.
18341_P4_Assertions
Starter code for the Assertions project
18341_P5_USB
Starter code for USB Project
18240Tools
Student facing tools for 18-240
Language:PythonGPL-3.0000
18341-assertions_student_version
F17 Assertion Project: starter code and instructions for students
Language:SystemVerilog000
18341_P1_Warmup
Starter code for 18-341's Project 1: Warmup
Language:SystemVerilog000
18341_P2_MatrixMultiply
Starter code for P2 in 18-341
Language:Verilog000
18341_P3_NOC
Starter code for project 3
Language:SystemVerilog000