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Algo-Goer / OSCPU

我的一生一芯项目

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MYCPU

This is my cpu in the project of ysyx!

pull code

git clone https://github.com/yuhanzhu612/OSCPU.git

cpu designed by verilog

  1. The code is in this directory
  2. AXI birst transfer
  3. 4KB Icache
  4. 4KB Dcache

To run the tests read the README_YSYX.md

cpu designed by chisel

  1. The code is in this directory
  2. AXI birst transfer
  3. 4KB Icache
  4. 4KB Dcache

To run the tests read the README_YSYX.md

About

我的一生一芯项目

Languages

Language:C++ 48.3%Language:Verilog 34.3%Language:Scala 11.9%Language:C 4.2%Language:Makefile 0.5%Language:Python 0.3%Language:Shell 0.1%Language:Yacc 0.1%Language:Assembly 0.1%Language:Lex 0.0%Language:SystemVerilog 0.0%Language:CMake 0.0%Language:Fortran 0.0%