Give me your verilog code, I will give you a testbench for it.
Make sure you have python on your system.
python tbgen.py input_verilog_file_name [output_testbench_file_name]
Author: Xiongfei(Alex) Guo xfguo@credosemi.com
License: Beerware
Generate testbench for your verilog module.
Give me your verilog code, I will give you a testbench for it.
Make sure you have python on your system.
python tbgen.py input_verilog_file_name [output_testbench_file_name]
Author: Xiongfei(Alex) Guo xfguo@credosemi.com
License: Beerware
Generate testbench for your verilog module.
Other