Giters
Achilles_X (Achilles626)

Achilles626

Geek Repo

0

followers

4

following

1

stars

Github PK Tool:Github PK Tool

Achilles_X's starred repositories

darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Language:VerilogLicense:BSD-3-ClauseStargazers:2093Issues:0Issues:0

verilog_axi-interconnect

AXI Interconnect

Language:VerilogStargazers:44Issues:0Issues:0