Abonite / MACPU-FPGA

Verilog implementation of MACPU

MACPU-FPGA

let's Make A CPU

Verilog implementation of MACPU

About

This is a personal contact project. Continuously updating. For more information about the algorithm model of the CPU, you can check here. About the assembler of the CPU, you can check here.

ISA

You can read the detailed ISA design document here.

Some coding rules

1.When naming the variable that type is "wire", the bus must starts with "b_", and all interfaces connected to the bus must end with "_bus". In each module, the interface connected to the bus should be set with tri-state gates for IO control, and provide corresponding effective control signals for this interface.

Test

Module testing with cocotb