A-T-Kristensen

patmos_HLS

Hardware Accelerators (HwAs) constructed in Vivado HLS

simple-alu-uvm

This is full tutorial of UVM (Universal Verification Methodology) for a simple ALU unit

rf_unfolding

Repository for the paper "Identification of Non-Linear RF Systems Using Backpropagation".

02456-deep-learning

Exercises and supplementary material for the deep learning course 02456.

openofdm

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

aegean

Configuration framework for the T-CREST platform (Aegean)

hdl

HDL libraries and projects

HLS-canny-edge-detection

FPGA implementation of Canny edge detection by using Vivado HLS

KU_Leuven_DiSIC

Digital Self-interference Canceller

nexmon

The C-based Firmware Patching Framework for Broadcom/Cypress WiFi Chips that enables Monitor Mode, Frame Injection and much more

nexmon_csi

Channel State Information Extraction on Various Broadcom Wi-Fi Chips

openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

patmos

Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project

reconfig_hls

Hardware and script files related to dynamic partial reconfiguration

thymio-radio-map

Automated radio map construction using a Thymio II and a Software-Defined Radio (SDR)

wcnc2024_monostatic_sensing_openwifi