zhuanhao-wu

vscode-riscv-support

AppFlowy

AppFlowy is an open-source alternative to Notion. You are in charge of your data and customizations. Built with Flutter and Rust.

aws-fpga-app-notes

Application notes for the F1 EC2 Instance

aws-fpga-miner

chisel-testers2

Repository for chisel3 testers2 open alpha

chisel-tool

some useful scripts for working with chisel

chisel3

Chisel 3: A Modern Hardware Design Language

contests

Focus training

Custom_Part_Data_Files

Xilinx PCIe to MIG DDR4 example designs and custom part data files

dpcpp-riscv

An implementation of the RISC-V core using intel dpcpp toolchain targeting FPGA

eda-collection

large-language-models

Notebooks for Large Language Models (LLMs) Specialization

Math-learning

数学参考书/笔记/复习资料, 提醒自己在数学上做的更好

matrix_mult

MDM-functional-simulator

monker

The money maker machine.

pastebin

A Python class for the API on pastebin.com

pymtl

Python-based hardware modeling framework

RapidWright

Build Customized FPGA Implementations for Vivado

RapidWright-binder

riscv-vector

Vector Acceleration IP core for RISC-V*

rtl-modeling

This project illustrate the differences between PyRTL and PyMTL in terms of modeling

systemc-clang

systemc-clang-verilog-conversion

vcu1525_scripts

Various VCU/BCU/BTU scripts and tools.

XilinxTclStore

Xilinx Tcl Store

xmr-stak

Unified All-in-one Monero miner

z7test_synth

zhuanhao-wu.github.io

zhw

ZFP Hardware Implementation