xelalin's repositories
DNNDK_Installation
This is a tutorials to quickly install DNNDK, Caffe and TensorFlow.
2021-LPCVC-Referee
The evaluation system (referee) for the 2020 Low Power Computer Vision Challenge.
32_bit_MIPS_Pipeline_Datapath_Simulation
Computer Architecture Project - Understand how the process of execution of the machine code in the MIPS pipelined data path takes place.
ai-accelerators
CSV spreadsheets and other material for AI accelerator survey papers
AIdea-FPGA-Edge-AI
Sample code for AIdea FPGA Edge AI – AOI Defect Classification competition
asl_tutorial
Tutorials based on the ASL (American Sign Language) dataset
astyx-vis
visualization of ASTYX automotive dataset (radar/lidar/camera)
awesome-radar-perception
A curated list of radar datasets, detection, tracking and fusion
chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
fpga_craft
A voxel game/Minecraft clone for the iCE40 UP5K FPGA
FpOC
FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.
glow
Compiler for Neural Network hardware accelerators
I.IMX8_Thor96
Arrow Global solution based on iMX8M MPU for Human Machine Interface Applications
ITRI-OpenDLA
OpenDLA for trying the demo and FPGA solution
kr260_robotic_arm
A robotic arm controller design based on AMD/Xilinx KR260 FPGA dev-kit.
PicoEVB
Public repository for PicoEVB (Xilinx Artix XC7A50T based)
soDLA
Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated
Tengine
Tengine is a lite, high performance, modular inference engine for embedded device
tensil
Open source machine learning accelerators
Vitis-AI-DPU_TRD-for-ZCU106
Port of the ZCU104_dpu Vitis Platform to the ZCU106 with instructions to build Vitis DPU_TRD
xup_vitis_network_example
VNx: Vitis Network Examples
yolov2_xilinx_fpga
A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard