could I use icesugar impelement VexRiscv
fatalfeel opened this issue · comments
in https://github.com/wuxx/VexRiscv
VexRiscv small and productive (RV32I, 0.82 DMIPS/Mhz) ->
Artix 7 -> 232 Mhz 816 LUT 534 FF
Cyclone V -> 155 Mhz 492 ALMs
Cyclone IV -> 155 Mhz 1,111 LUT 530 FF
iCE40 -> 63 Mhz 1596 LC
can icesugar impelement VexRiscv?
could you add friend list some problem need help
wechat: padmafeel
@fatalfeel Yes you can and it has already been done: https://github.com/enjoy-digital/litex
@fatalfeel And IceSugar is supported, see here: https://github.com/hansfbaier/litex-boards/blob/master/litex_boards/targets/muselab_icesugar.py
OK
thnaks my final goal is make risc-v cpu build on chisel3 scala with InteliJ IDE
OK
plz add wechat friend: padmafeel
thanks
after I built https://github.com/wuxx/VexRiscv/tree/d6b845ef8c79a002b43c6e6bd825e3213ac6a381
I have VexRiscv.v and Murax.v
how do I burn it to Icesugar, how to use it
my goal is burn a risc-v
and
a lite os
and
using riscv gcc build a simple app on it
got it ~~~build ok now
root@homelinux:~/icesugar/icesugar/src/advanced/VexRiscv/scripts/Murax/iCESugar# make compile