woniubility's repositories
gdbgui
Browser-based frontend to gdb (gnu debugger). Add breakpoints, view the stack, visualize data structures, and more in C, C++, Go, Rust, and Fortran. Run gdbgui from the terminal and a new tab will open in your browser.
Surelog
SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX
icyradio
Over-engineered SDR development board
guacamole-docker-compose
Guacamole with docker-compose using PostgreSQL, nginx with SSL (self-signed)
quard_star_tutorial
This project aims to build an Embedded Linux System, in order to analyze the chip from the power-on execution of the first instruction to the entire system running, based on qemu simulator development board. 本项目旨在真正从0开始构建嵌入式linux系统，为了剖析芯片从上电开始执行第一条指令到整个系统运行，基于qemu定制模拟器开发板。
libconfuse
Small configuration file parser library for C.
AWSteria_Infra
"Middleware" (infrastructure) for host-FPGA applications (e.g., accelerators)
ZYNQ7010-7020_AD9363
基于ZYNQ+AD9363的开源SDR硬件
riscv-formal
RISC-V Formal Verification Framework
Open-Source-RTL-Design
This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs
pluto-gps-sim
PLUTO-GPS-SIM generates a GPS baseband signal IQ data stream, which is then transmitted by the software-defined radio (SDR) platform ADALM-Pluto.
RISC-Verdi
Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.
Zynq_winUSB
WinUSB implementation for the ZYNQ platform (Zybo board)
WINUSB_loopback
Loopback program to test the WINUSB device. uses WINUSBNET library
OS2018spring-projects-g08
http://os.cs.tsinghua.edu.cn/oscourse/OS2018spring/projects/g08
usb-metamorph
USB Metamorph
usbip-ssh-docker
Tunnels USB devices over ssh using docker, with automatic device detection.