v5run / DE1-SoC-ComboLock

The project below orients the likes of Verilog, Intel Quartus Prime, and DE1_SoC boards to compute a combination lock through Moore FSM applications!

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DE1-SoC-ComboLock

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Table of Contents
  1. About The Project
  2. Functionality
  3. Seven-Segment-Display
  4. Moore FSM State Design
  5. Contact

About The Project

Combination locks remain important today as they provide a reliable and keyless security solution, offering convenience and peace of mind in various settings such as securing personal belongings, ensuring restricted access to spaces, and enhancing the overall safety of assets without the need for physical keys or advanced electronic systems. The project below orients the likes of Verilog, Intel Quartus Prime, and DE1_SoC boards to compute a combination lock through Moore FSM applications!

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Built With

  • Intel Quartus Prime

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Functionality

Opening the Door

  • User sets a desired 4 bit input (X = x3x2x1x0) as the password, or continue with pre-determined password (0110).
  • If X matches the stored 4-bit combination, the door opens.
  • The door remains open until Enter is "pressed" again, resetting the FSM.

Alarm System

  • If two incorrect combinations are entered consecutively, the alarm goes off.
  • The alarm can only be canceled by resetting the system.

Changing the Combination

  • When the system is reset, the stored combination is set to '0110'.

  • To change the combination:

    • Set the input to the old combination.
    • "Press" Change
    • If done correctly, output will signal the user to enter a new combination (n on 7 seg. disp.).
    • Set the 4 input bits to the new combination and "press" Change to store the new value.

Seven-Segment-Display

  • Utilize seven-segment display HEX5 to provide output for the circuit.
  • Display '-' if all outputs are neutral.
  • Display 'A' if the alarm is active.
  • Display 'n' if the system prompts for a new combination.
  • Display 'O' if the door/lock is open.

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Moore FSM State Design

  • Analyzes machine behaviour and simplifies required states
  • See state diagram & block diagram here

Contact

Varun Pathak - @LinkedIn - pathav4@mcmaster.ca

Project Link: https://github.com/v5run/DE1-SoC-ComboLock

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About

The project below orients the likes of Verilog, Intel Quartus Prime, and DE1_SoC boards to compute a combination lock through Moore FSM applications!


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Language:Verilog 100.0%