SAMPL's repositories
dtr-prototype
Dynamic Tensor Rematerialization prototype (modified PyTorch) and simulator. Paper: https://arxiv.org/abs/2006.09616
sparsetir-artifact
Repository for artifact evaluation of ASPLOS 2023 paper "SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning"
relay-bench
A repository containing examples and benchmarks for Relay.
uwsampl.github.io
The UW SAMPL group's website.
vta-distro
A repository to cache VTA bistreams
3la-ir-example
Example showing the different stages of Relay and TVM IR for a single program.
verilator-unisims
This is mainly a simulation library of xilinx primitives that are verilator compatible.
2023-05-03-yosys-lakeroad-demo
Demo of Yosys+Lakeroad integration for Yosys team.
calyx
Intermediate Language (IL) for Hardware Accelerator Generators
circt
Circuit IR Compilers and Tools
dahlia
Time-sensitive affine types for predictable hardware generation
f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
FlexGen
Running large language models on a single GPU for throughput-oriented scenarios.
marius
Large scale graph learning on a single machine.
SOFA
SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA