Number of pipeline stage mismatch for other GPU configurations

[Haiyue Ma]

Hi! I was trying to use other GPU configuration files to run vulkan-sim and I noticed an issue with the pipeline width. The original gpgpusim only has 13 pipeline stages, but since vulkan-sim added two extra stages "ID_OC_RT", "OC_EX_RT" in vulkan-sim/src/gpgpu-sim/shader.h:
const char *const pipeline_stage_name_decode[] = { "ID_OC_SP", "ID_OC_DP", "ID_OC_INT", "ID_OC_SFU", "ID_OC_MEM", "OC_EX_SP", "OC_EX_DP", "OC_EX_INT", "OC_EX_SFU", "OC_EX_MEM", "EX_WB", "ID_OC_TENSOR_CORE", "OC_EX_TENSOR_CORE", "ID_OC_RT", "OC_EX_RT", "N_PIPELINE_STAGES"};

the code will error out when running GPU configs with only 13 stages (e.g. SM7_QV100). What's the best way to resolve this?

Another related question: I also tried on my own config of RTX3070, based on gpgpusim git directory's RTX3070 config + RT core gen 1 spec from vulkan-sim's RTX2060 config (I can't find spec for 3070's RT core gen 2 online). The config file is here. I added the two extra RT pipeline stages and removed some options that vulkan-sim doesn't support. Although the runs can be launched, simulations all fail with deadlocks.

Ideally I'd want to model some Ampere GPU with a RT core, so if you happen to have some working configs lying somewhere I'd really appreciate it! If that's not possible I can go with something like QV100 as long as I can get a valid configuration for simulation.

Thanks!