edif

There are 0 repository under edif topic.

spydrnet
byuccl / spydrnet
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
cad circuit circuit-analysis circuit-design circuits computer-aided-design digital eda edif electronic-design-automation fpga fpgas hardware hardware-designs netlist netlist-parser netlists transformation transformations
Language:Python 89
byuccl / spydrnet-tmr
TMR utilities for the SpyDrNet project
blif computer-aided-design digital edif electronic-design-automation fpga fpgas hardware-designs netlist netlists tmr transformation transformations verilog eblif triple-modular-redundancy spydrnet
Language:Python 4
JensRestemeier / EdifTests
A few experiments using the SpyDrNet netlist library.
edif netlist spydrnet
Language:Python 3
sinkuu / edif-rs
EDIF netlist parser
electronics edif rust
Language:Rust 3
kitanokitsune / S-expression-library-for-Python
S-expression data structure parser/manipulator intended for parsing and manipulating lisp program, lisp data, netlists like EDIF and KiCAD, etc.
library python s-expressions cad edif lisp netlist
Language:Python 0