Tharal-Pius's repositories

biriscv

32-bit Superscalar RISC-V CPU

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bitcoin

Bitcoin Core integration/staging tree

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ECE1373_2016_hft_on_fpga

High Frequency Trading using Vivado HLS

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hardcaml

Hardcaml is an OCaml library for designing hardware.

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iverilog

Icarus Verilog

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Tharal-Pius

Config files for my GitHub profile.

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riscv

RISC-V CPU Core (RV32IM)

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VeriGPU

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

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verilog-pcie

Verilog PCI express components

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Welcome-to-Open-Source

Make your first PR request! And enter the world of Open Source Contributions 🍉

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