sujianleo / iob-mem

Verilog behavioral description of various memories

IOb-mem

Test all memory modules

From the top directory, type make.

Test a specific memory module

Go to the memory folder and type make.

Simulate a specific memory module

In the memory folder, type make sim.

Parameter configuration

For specific memory modules, there are parameters that can be configured.

RAM: RAM=1 to use RAM; RAM=0 otherwise (default).

R: R=1 for READ_DATA > WRITE_DATA; R=0 otherwise (default).