Giters

stsrc / audiocard

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Writing to TUSB1210 registers

tomverbeure opened this issue · comments

commented

Hey!

I'm using the DECA board as well, and I'm trying to get register reads and writes to work.

I notice this comment (from this discussion):

Maybe I have a clue - I could not communicate with tusb1210 as it is written in ULPI standard. To write to tusb1210 register, I had to make some hacks (i.e. register usb_stupid_test in top/ULPI.v), what is ridiculous, but after this hack it finally started to work (for few days...). And I've tested ULPI.v on hardware (writing to "draft/test" register values which increments by 1 per 0.2s and read it back - on LEDS it has shown nice and normal counter).

I wanted to see what you're doing in ULPI.v, but right now, it's all VHDL, not Verilog.

Do you have more details about what needs to be done to make register reads and writes work?

Thanks!
Tom

commented

Hello,

to read and write from tusb1210 registers FPGA logic should be clocked on falling edge of pin H11 clock, because of timing issues (I've found this solution in some example project).

Still I had some spurious results with USB stack and I gave up with this project. The comment you have quoted is mine also, so I am sorry that there is no verilog code any more.

With regards,
Konrad Gotfryd

commented

Ok, that makes sense. ULPI interface timing is quite difficult to meet with an FPGA.

I have been looking at some DECA USB examples by Intel, and while the Verilog for the ULPI core is encrypted, the top level is not, and they are using a PLL on the 60MHz clock to shift the rising edge 120 degrees earlier. Inverting the clock like you did might be a bit too aggressive.

I was hoping to be able to avoid a PLL, but it seems like I’ll just have to try that.

Thanks!
Tom

commented

Mystery solved: https://twitter.com/tom_verbeure/status/1398515158842966016?s=21

The DECA board has a level shifter on the ULPI clock line that introduces huge hold violations on the ULPI NXT, DIR, and DATA lines that enter the FPGA.

commented

@tomverbeure have you managed to do anything with DECA and usb? Is there anything public?

commented

I just made my private repo public: https://github.com/tomverbeure/usb_system/commits/main.

I don’t have a usable system right. I got to the following point:

  • ULPI works reliably
  • It receives control packets
  • I think it can also reply some hard coded packets. I remember seeing some packets flying around in my USB analyzer.

But I lost interest after that.

commented

Hans Baier has created a USB sound card recently: https://twitter.com/hansfbaier/status/1478863459714420737?s=21.

He’s using Litex instead of SpinalHDL.

commented

thanks a lot!