stm32-rs / stm32l4xx-hal

A Hardware abstraction layer for the stm32l432xx series chips written in rust.

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Sysclk handling in Rcc::CFGR::freeze() is inconsistent when a PLL is used

fhars opened this issue · comments

As far as I understand the code, all clock calculations in freeze() use the last sysclk value specified with either the sysclk() or the sysclk_with_pll() methods, but if sysclk_wit_pll() has been called at least once, the actual sysclk used is the output_clock as calculated in let output_clock = vco / r;, which can be a completely different value