Flash wait states in RCC

[David O'Connor]

I'm going through the RCC module.

1: Check Reference manual section 3.3.3: There are 5 possible wait states. I think the current code is copy+pasted from a different HAL that has a different setup.

2: Wait state calculation is based on HCLK, not sysclk. Ie, you need to offset for the multiplier.

The relevant section should look something like this:

        let hclk = sysclk as f32 / self.hclk_prescaler.value() as f32;
        // Reference manual section 3.3.3
        flash.acr.modify(|_, w| {
            unsafe {
                if hclk <= 16. {
                    w.latency().bits(0b000)
                } else if hclk <= 32. {
                    w.latency().bits(0b001)
                } else if hclk <= 48. {
                    w.latency().bits(0b010)
                } else if hclk <= 64. {
                    w.latency().bits(0b011)
                } else {
                    w.latency().bits(0b100)
                }
            }
        });

[Oliver Rockstedt]

I can confirm that the current wait states configuration is incorrect. Also, prefetch is also not enabled. Is this intentional?

[Vincent Stakenburg]

Is anyone working on this? This seems like a rather critical mistake. If not I'll try to whip up a proper solution.

[Vincent Stakenburg]

I believe this can be closed now :) @MathiasKoch

[Mathias Koch]

Yes, i missed that it wasn't linked