Jari Beguš's repositories
ddr3-controller
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
arty_s7_playground
Digilent's Arty S7-50 in Verilog 2001
pxl-iconpack
A full-of-features, easy-to-customize, free and open source, Material Design dashboard for icon packs.
someone755.github.io
My webpage/blog/who knows what at this point honestly.
tomfoolery
Random stuff I do, sorted by branches