silviumusa's repositories
mor1kx
mor1kx - an OpenRISC 1000 processor IP core
Language:VerilogNOASSERTION000
orconf
OpenRISC Conference Website
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newlib
newlib OpenRISC development
Language:CGPL-2.0000
orpsoc-cores
Core description files for FuseSoC
Language:Verilog000
llvm-or1k
LLVM backend for OpenRISC 1000
Language:C++NOASSERTION000
clang-or1k
Clang for OpenRISC 1000
Language:C++NOASSERTION000
libunwind-or1k
Zero-cost (Itanium ABI) exception handling library for OpenRISC 1000
Language:C++000
linux
Linux kernel source tree
Language:CNOASSERTION000
or1k-gcc
GCC port for OpenRISC 1000
Language:CGPL-2.0000
Language:HTML000
doc
Misc documentation and specifications
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community-wiki
Community Wiki clone
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or1200
OpenRISC 1200 implementation
Language:Verilog000
or1k-tests
Unified OpenRISC 1000 test suite
Language:Assembly000
Language:Tcl000
or1k-src
OpenRISC 1000 port for sourceware.org's src tree (binutils, gdb, newlib, etc.)
Language:CGPL-2.0000
or1k-headers
OR1K Common Headers
Language:Python000
old-openrisc-svn
Copy of the old OpenCores OpenRISC Subversion
Language:C000
uart2spi
UART To SPI
Language:Verilog000
uClibc-or1k
uClibc for OpenRISC 1000
Language:CLGPL-2.1000
or1ksim
The OpenRISC 1000 architectural simulator
Language:CGPL-3.0000
or1k-glibc
glibc port for or1k
Language:CGPL-2.0000
openOCD
openOCD including OpenRISC with adv_debug_sys
Language:CGPL-2.0000
orbuild
OpenRISC build system
Language:Verilog000
Language:CGPL-2.0000
or1k-dejagnu
DejaGNU port for or1k
Language:TeXGPL-3.0000