romanheros's repositories
cannoli
High-performance QEMU memory and instruction tracing
capstone
Mirror of git://qemu.org/capstone.git
dtc
Mirror of git.qemu.org/dtc.git
HelloSilicon
An introduction to ARM64 assembly on Apple Silicon Macs
KAE
A high-performance hardware acceleration algorithm library of OpenSSL engine based on Kunpeng processor
keycodemapdb
Mirror of git://qemu.org/keycodemapdb.git
libslirp
Mirror of https://gitlab.freedesktop.org/slirp/libslirp
llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
MagiCore
An out-of-order processor that supports multiple instruction sets.
openssl
TLS/SSL and crypto library
qemu_blog
A series of posts about QEMU internals
r2vm
Rust RISC-V Virtual Machine
Ripes
A graphical processor simulator and assembly editor for the RISC-V ISA
riscv-asm-manual
RISC-V Assembly Programmer's Manual
riscv-cfi
This repo holds the work area and revisions of the RISC-V CFI (Shadow Stack and Landing Pads) specifications. CFI defines the privileged and unprivileged ISA extensions that can be used by privileged and unprivileged programs to protect the integrity of their control-flow.
riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
riscv-isa-manual
RISC-V Instruction Set Manual
RISCV_ISA_Spec_Tour
Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)
rvjit-aa64
RISC-V static binary translator targeting AArch64.
sail-riscv
Sail RISC-V model
souper
A superoptimizer for LLVM IR
thead-extension-spec
T-head vendor extension Instruction Set spec