Ability to express transitions in csr coverpoints.

[Pawan Kumar Sanjaya]

Many of the privilege tests need to be able to express conditions which denote a transition in the value of the csrs. To do so, we can define a map variable which contains information about the csr updates as a result of the current information. This variable can then be used to express the condition for transition as follows:

# Coverpoint to test toggle of the D bit in misa.extensions field from 1 to 0.
misa[3] == 1 and misa in csr_update and csr_update['misa'][3] == 0

A particular csr write can be triggered due to one of 4 conditions.

1. CSR operation instruction
2. Trap due to interrupt or exception
3. Side effect of a write to a different csr
4. Side effect of a instruction(like fld/fsd cause a change in the FS bit of mstatus).

Further extension of the feature:

It might also be beneficial to tag each csr update with the reason for such an update. It is possible that at a particular instance multiple csrs are updated due to a mixture of different reasons( like mstatus is updated due to 4 but at the same time an interrupt is taken which causes an update in mstatus too (due to 2)). This might allow us to explicitly specify coverpoints which test for the occurrence of a particular exception or interrupt too.

Thoughts @allenjbaum @neelgala ?