Page size is hardwired to 4kB
antonblanchard opened this issue · comments
Some architectures can use a page size other than 4kB (POWER, Ultrasparc, ARM64). Mesh uses a constant of 4kB to express the page size, and it should instead use an API at run time such as getpagesize().
@antonblanchard good catch, we indeed hard code the page size in (I suspect) multiple places. On these architectures is page size actually dynamic (needing to be looked up at runtime), or is it known at compilation time?
I suspect properly supporting non-amd64 architectures is going to take more than just updating the constant -- maybe I can spin up one of Amazon's new arm64 instances to bring up support.
@bpowers it depends on the architecture. On POWER it needs to be a run time decision unfortunately, because most distros use 64kB pages but it is just a kernel compile option to switch between 4kB and 64kB. I suspect most ARM64 boxes are going to be 4kB default, and switchable to 64kB via a kernel config option. I'm not sure if OSU are currently accepting requests, but they offer POWER9 VMs for open source projects at https://osuosl.org/services/powerdev/
Run time detection of page size might have other advantages, like allowing Mesh to work with large pages which have even more issues with fragmentation when used as a backing store for malloc
Note: I'm not sure how widely explicit large pages are used these days, since transparent huge page support on Linux gives a lot of the benefits without the downsides.
Macs with Apple Silicon have a 16kB page size, which is going to force us to at least abandon the 4kB hardcoded value for something at compile time.