P2 causes MCP invalid address

[Google Code Exporter]

Attempting to run with Processor 2 enabled typically results in a system-level 
invalid address "punt". The second processor's Normal light blips briefly, but 
then the system halts.

Original issue reported on code.google.com by [e-mail] on 12 Aug 2013 at 4:42

[Google Code Exporter]

Problem was due to the way that Initiate P2 (IP2) and Halt P2 (HP2) were 
working. Both were being activated from P1, through CentralControl, and were 
setting state in P2 directly. P1 was continuing to execute for the rest of its 
time slice, however, so there could be an extended period of time during which 
P2's state was loaded and ready to run, and during which P1 could decide to 
halt P2.

The solution, not surprisingly, was to make the interaction with P2 work more 
like it did on an actual B5500. P2 now tests cc.HP2F at SECL to determine when 
to stop. P1 now ends its time slice when either initiating or halting P2 to 
give P2 a chance to act on its new state immediately.

Implemented in release 0.17 (r383). P2 now appears to function properly.

Original comment by [e-mail] on 28 Dec 2013 at 9:57

• Changed state: Verified