DMSBoard: Implement Input SPI Protocol
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Overview
4 PGA280 have been added to further control the input signal. Those 4 ICs can be controlled via SPI. A new SPI Bus has been established from SAM to those 4 ICs.
An Interface for some of the functions of the PGA280 shall be implemented to enable further control of the input signal.
Definitions
SPI Pins
Following Pins have been defined for the INA SPI:
| SAM Pin | Function |
|---|---|
| PB16 | INA MISO |
| PB17 | INA CS |
| PB18 | INA SCLK |
| PB19 | INA MOSI |
The Chip Select Pin is multiplexed to enable the Selection of 4 PGA280:
| SPI CS0 | SPI CS1 | Selected |
|---|---|---|
| 0 | 0 | Chip 1 |
| 1 | 0 | Chip 2 |
| 0 | 1 | Chip 3 |
| 1 | 1 | Chip 4 |
Function1: Mode Selection
The PGA280 enables the selection between voltage mode and current mode. Following switches have to be set:
PGA280 Datasheet, Page 17, Figure 44
Current Mode
- B1b on
- B2b on
- Both Buffer on
- Buffer Timeout to 0
- all other off
Voltage Mode
- A1b on
- A2b on
- Both Buffer on
- Buffer Timeout to 0
- all other off
Function 2: Gain Selection
The PGA280 has a 5bit Gain Setting, which shall be controlled via SPI. This can be controlled via Register 0 by setting G0..G4. See Datasheet Page 31..32