Panda-Cores

Panda-Cores's repositories

PandaZero

A pipelined, in-order implementation of the RV32I ISA

Language:SystemVerilog6 2 8

common

Language:SystemVerilog2 4 12

wishbone

Language:SystemVerilog2 30

debug_module

Language:SystemVerilog1 3 1

load_store_unit

Language:SystemVerilog1 2 2

timer_module

Language:SystemVerilog1 30

caches

simple WB cache, WorkInProgress

Language:SystemVerilog020

gpio_module

Language:SystemVerilog020