nturley / netlistsvg

draws an SVG schematic from a JSON netlist

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Request: Padding

71GA opened this issue · comments

Is there a way to create a padding at the edges.... Sometimes my signal names get cut off it happens with signals pcb_oscilator, pcb_spi_sck, pcb_spi_csn and pcb_spi_si on the left:

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Some padding could solve this. It would be nice if we could set custom padding!