Issues with my attempt to compile
okwatts opened this issue · comments
Sorry if this is the wrong way to communicate but I am having trouble compiling the project as it gives an error saying that Error (10481): VHDL Use Clause error at SBCTextDisplayRGB.vhd(295): design library "work" does not contain primary unit "SansBoldRom".
In addition I have been using the bare minimum internal Ram version to debug. Using the pof in the zip file I can run this and use Camelforth but the SD light is on (no sd card holder present at the moment?) and the reset key has no effect it appears that line is permanently low. I have got the sera line working with a terminal but the external ram is flaky will not stay consistent. If I remove the fpga board from the v1.10 board the reset symptoms are the same. As you can tell I am a newbie at this FPGA stuff but have managed to get Grant's bare bare minimum versions for the 6502 and Z80 to work as well as the multicomp08_iram version. I have ordered another FPGA board to see if this one is wonky, just waiting for arrival. Thanks Larry
Hi Larry,
the code supports 2 different fonts. One is stored in files Components/TERMINAL/CGABold* the other in Components/TERMINAL/SansBold*. In SBCTextDisplayRGB.vhd this line selects (at compile-time) which is used:
constant SANS_SERIF_FONT : integer := 1 -- 0 => use conventional CGA font, 1 => use san serif font
So, setting 0 should solve your problem.. but you should not be seeing this problem...
The top-level project/design should be "MicrocomputerPCB" - that is the latest. If you are using one of the other top-levels the problem is probably that the SansBold* files are missing from the MicrocomputerPCB.qsf file (you can add them from the GUI or by hand-editing the file).
The SD LED should not default on (with or without the SDcard fitted) and the reset key should work! It might be worth taking a look at the cyclone board schematic (on Grant's site) and working out what are the adjacent pins on either side of those two pins, then buzzing out to see if there's a short.
The fact that you have successfully built the z80 and 6502 versions working shows that you have climbed the learning curve to a useful degree! There are lots of z80 systems around but I haven't heard of anyone building the 6502 variant; what software are you running on it?
For reference: are you building on Linux or Windows?
Neal.
since you have a scope.. create a new project (clone the files of the existing project) keep the port list and delete all of the components. Code a counter and tie the counter outputs to pins assigned to LEDs, address lines etc. You can even redefine RESET pin as an output and drive that too. Then, with oyur scope you can check that all the pins are toggling cleanly and at the right frequency - any shorts will be obvious.
Neal.
Thanks for the suggestion, I will give it a try (will take an introduction to really using VHDL before I can report on this.)
Will update this when I have some results.
Hi Just an update to say that while I have yet to track down the issues with the original FPGA board, my second board arrived today. I installed that and the external memory checks out fine and the reset button works. The SD led and the one next to it (D4 on the FPGA board) still stay lit with the your version of multicomp. ( I recall that with Grant's only the SD led was lit). I checked that the SerA works but I am still awaiting the SD card holder to go further. At least I know the problem is on the original FPGA. I may try to get to the bottom of it or I may just try and return it for another. It seems it might be like a lottery as to the quality! Also I have yet to try the RTC (actually I can't yet) but the board I got has the pins facing the top side so I will have to desolder and reverse so I can install on the board. I will check it with an Arduino and then use jumper wires to test before desoldering.
Thanks again for the work and comments on the wiki. I look forward to fully using the software for the SD card. If I can I will have a go at the 6502 as my first micros were a KIM and SYM (which I still have) I used DOS/65 (a CP/M alike from Richard Leary) on those using a home built floppy controller (still have the drives and media!) I will likely borrow from your work and the CP/M versions to help me get it to work with the SD as you have done.
Just an update to say I have received 3 FPGA boards and each of them has had a problem. My original board had 4 pins on the FPGA in the 141-144 area that did not connect to the pads on the circuit board through misalignment or poor solder. I managed to see this with a microscope camera and was able to correct them with a fat soldering tip and a sharp needle to align them. My second board seemed to work well until I tried the SD card. Turns out the sdCS line is at about 1.6 V and won't go lower so never get to select the SD. I will try and work around that. The last board seems to have sramAddress(2) stuck at ground haven't been able to determine why but again may ask for a replacement or try another pin. It seems pin76 on the FPGA is about the only free pin for output if you want to keep all other options available.
Hi Neal
I have been using and appreciating your 6809 additions and work to make a pretty complete ability to run most non graphical programs for this CPU. I have a question as I contemplate moving to implement a 6502 version. As one who has very little VHL experience I looked over your version and to my untrained eye, I would expect that apart from the clock modifications where you use hold to limit rate of execution a good deal of the added and improved code could translate to the 6502, ie GPIO,MMU and SDCARD. Do you have any comment on this or is my lack of understanding so complete that I should just stay away from it entirely.
Thanks
Larry
Hi Larry,
I am glad you continue on your Great Learning Experience (I do prefer this to soldering nowadays!) As far as I know nobody has done any evolution of Grant's original 6502 design so I think this is a great project. I am sure there is lots of 6502 software around in one form or another that could be leveraged (eg, Wozniak's sweet16 monitor).
I think you have correctly scoped the work required. I strongly recommend that you get up-and-running with the Modelsim simulator that is part of the Quartus package, because this provides the best method for debugging the clocking/control changes that you will need to make. Get started by getting the simulator running on the 6809 board -- there are some details on my wiki pages here. Next, try writing a tiny loop in 6809 code and put it in the ROM, and see that you can simulate it. Armed with this experience, you can rip out the 6809 and bolt in a 6502. Create a simple code loop in a ROM for the 6502 and you will have pretty much everything you need to debug the system.
Let me know if you get stuck or need more detailed tips. I am not a VHDL expert (I prefer and usually use Verilog) but for coding simple combinational and clocked logic, the existing top-level code should provide examples of all of the structures you need. If you understand enough digital electronics to know what you're trying to create, it should be straightforward (especially with the aid of the simulator) to code.
regards,
Neal.
Cool; sounds like you have made lots of progress with Grant's basic design. There's a really nice article on FAT32 here: https://www.pjrc.com/tech/8051/ide/fat32.html which makes basic accessing seem quite straightforward. I suggest porting the SDcard logic from my 6809 design because it has support for larger cards (the small card supported by Grant's original design are not so easy to find now). In general, the versions in my code-base have been cleaned up in various ways and should synthesise more cleanly and with a faster clock.
I think if you get modelsim going you will be able to inspect the 6502 running, and the 6809 running so you will have a good idea of how to control the 6502 in a new design based from my 6809 stuff. It looks as though you can use either ENABLE or RDY to stall the 6502. I don't want to spoil your fun, but if you get stuck feel free to ask for help.
Hi Larry,
"plasmo" is so prolific! I've enjoyed looking at lots of his 68xxx designs. One day, I will build one (I have a 68008, several 68000 and a 68020 in my junk box!)
My early "Nascom" prototypes used the Multicomp PCB & FPGA. For the full PCB I changed a lot of the FPGA pin assignments to make the PCB easier to route.
If you are able to rebuild the (latest) FPGA code it should be straightforward to re-target it for the Multicomp PCB. It would be best if you connected push buttons for "reset" "warm reset" and "non-maskable interrupt". and LEDs for "HALT" and "TAPE".
You will end up with PS/2 keyboard, VGA screen (switchable between 48-column and 80-column), SDcard storage and a serial port. You will be able to run all NASCOM software, including PolyDOS and you will be able to run CP/M with a paged RAM disk. No modifications of my software should be needed.
If you get started and get stuck I will be able to drop you hints!
Neal.
Hi Neal I'm beginning to think this should be in the Nascom file. I have tried to get Nascom4 going on my multicomp and while I can see the SBD on the screen, the keyboard is not registering. If I boot with no SD card and use the warm reset I see the NAS-SYS3 but there is often a string of characters "gh..." and the PS/2 Keyboard doesn't generate any response. I did once after pressing on the FPGA board manage to actually get it to operate and could boot Polydos then it disappeared and never was seen again. It makes me suspect something is floating, but I have tried a bunch of things and nothing has worked. I include the QSF file which shows the pins I have assigned. Perhaps you could look it over and see if I have made a silly mistake. I know I am close but have not succeeded to make it reliable. I have used the exact setup of FPGA and Multicomp to run other versions like my 6502 software and I believe the hardware to be reliable. Thanks
NASCOM4.zip
.
I think your guess about a floating node is correct. There is some magic to choose between the ps/2 and nascom keyboard. In the latest nascom4.vhd (i revised it yesterday) look at lines 851-855 and identify the equivalent lines in your copy. Please try commenting out the IF so that you always get data from ioprd00.
Cool! Glad you got it running successfully. You might like to join the Nascom group on groups.io
Neal.
Great read (talk about perseverance ...). I came here because I too ran into trying to build the wrong top-level. I have one working EP2C5 board and one which isn't (both hand-wired with external 128k chip + serial + SD). This is from a few years back, no PCB involved. I don't want to mess up my working setup (with a Z80), but would love to get a 6809 going on the second board, especially with the memory mapper). The Altera project now builds correctly. Having read about bad boards and pins, and the counter trick to verify proper connectivity, I hope to be able to work my way through this.
Thanks, Neal, for all the work you've done and shared. It really eases a S/W guy's way into all this FPGA stuff ...
OK, I have retired the Microcomputer4 tree, leaving just MicrocomputerPCB. This should prevent any future confusion.