Morteza Rezaalipour's repositories
VerilogPADAnalyzer
VerilogPADAnalyzer is a Python application designed to analyze and report the Power, Area, and Delay (PAD) of Verilog input circuits.
JPEG_Encoder_VHDL
A Simple JPEG Encoder in VHDL
Synthesizable-VHDL-Implementation-of-Cyclic-Codes
My BSc Project: Implementation & Evaluation of a cyclic code using FPGA
VerilogChecker
A circuit equivalence checker given an error threshold for Approximate Computing
A-Simple-OpenCL-Project
A simple OpenCL project for parallel processing
helpful_vhdl_open_source
Simple VHDL examples using ghdl as compiler and wave generating