Allow threaded code in SRAM and/or EEPROM
mikaelpatel opened this issue · comments
The AVR is a Harvard Architecture with separate memory spaces (SRAM, EEMEM, PROGMEM). To allows threaded code in all memory spaces a synthetic unified address spaces is needed. This will impose a run-time penalty on the inner interpreter and any operation that access the instruction pointer, i.e. branch, literals, etc.
The token compiler generates code in SRAM but currently the kernel cannot access that. The address spaces need to be unified.
See commit dddb9fb.