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logisim-evolution / logisim-evolution

Digital logic design tool and simulator

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Combinational Analysis Not Fully Minimizing

UsrRed7 opened this issue · comments

commented

Working with a 4 bit input, some desired outputs aren't fully minimized.

Some examples:

  1. Data: [1, 0, 1, 1, 0, 1, 1, 0 , 1, 1, 0, 1, 1, 1, 1, 0]
    Formula: bc'd+a'b'd'+a'b'c+a'cd'+b'c'd'+ab'd+ac'+bcd'
    The K-map generated:
image
  1. Data: [0011111011110111]
    Formula: b'c+ab'+a'bc'+a'bd'+bc'd+cd'+ad
    The K-map generated:
image

I haven't looked at the code at all, but if pointed in the right direction I may be able to help track down the reason for this issue.

commented

Thanks for reporting the issue. Indeed, the form is not minimal, but at least correct. We highly appreciate any help to improve the optimization algorithm. The relevant code lives in src/main/java/com/cburch/logisim/analyze/. PRs are always welcome!

commented

If no one is working on it, I would like to work on it.

commented

@superenginegit: Thanks for volunteering! No one is currently working on this issue and the related issue #1914 (which I am at the moment not able to reproduce). Feel free to open a PR as soon as you would like feedback from us. You can mark it as draft als long it is not ready for merging. For the moment, I will assign you the issue.