laforest / Octavo

Verilog FPGA Parts Library. Old Octavo soft-CPU project.

Home Page:http://fpgacpu.ca/

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Use instruction annulling bit in Controller to re-issue annulled instruction

laforest opened this issue · comments

Have the bit which annulled an instruction with a failed I/O read/write (see #21 #22) follow the annulled instruction to the Controller, where instead of sending out the PC of the next instruction for the same thread (which was already stored in the PCM), we send out the previous PC to re-issue the annulled instruction.

This seems to imply having a subtractor in the output path of the Controller: we may have to move one of the 3 pipeline stages between I Mem and A/B back behind I Mem to compensate. Octavo already supports this change via a PC_PIPELINE_DEPTH parameter. Make sure to alter the other connected pipeline depths to match (adds up to 8 total).