kevinjuszczyk

usb-sniffer

Low-cost LS/FS/HS USB sniffer with Wireshark interface

RAG_Techniques

This repository showcases various advanced techniques for Retrieval-Augmented Generation (RAG) systems. RAG systems combine information retrieval with generative models to provide accurate and contextually rich responses.

altera-blaster-clone-cpld-firmware

A fork of https://ixo-jtag.sourceforge.net/ with a CPLD design fix

MeshAnything

From anything to mesh like human artists. Official impl. of "MeshAnything: Artist-Created Mesh Generation with Autoregressive Transformers"

max7_proto

Prototyping Board for Altera MAX7000 CPLDs

catapult-v3-smartnic-re

Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

nysa-sata

Projects

Ted Fried's MicroCore Labs Projects which include microsequencer-based FPGA cores and emulators for the 8088, 8086, 8051, 6502, 68000, Z80, Risc-V, and also Typewriter and EPROM Emulator projects. MCL51, MCL64, MCL65, MCL65+, MCL68, MCL86, MCL86+, MCL86jr, MCLR5, MCLZ8, MCL6809

xc2064

Xilinx XC2064 modeling and simulation in SystemC

pico-uart-bridge

Raspberry Pi Pico UART-USB bridge. Updated fror RP2040 PMOD

gr-nrsc5

A GNU Radio implementation of HD Radio (NRSC-5)

nrsc5

NRSC-5 receiver for rtl-sdr

DDR3-Notes

My notes for DDR3 SDRAM controller

list_of_Xilinx_FPGAs

v-usb

A Firmware-Only USB implementation for Atmel's AVR Microcontrollers

PolyLUT

PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial function learning to exploit the flexibility of the FPGA soft logic.

second_order_sigma_delta_DAC

A comparison of 1st and 2nd order sigma delta DAC for FPGA

neorv32

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

verilog-buildingblocks

Library of generic verilog buildingblocks

ice-chips-verilog

IceChips is a library of all common discrete logic devices in Verilog

Examples

xilinx-14.7-patch-for-Win10-32-64

Xilinx 14.7 patch for Win10 32/64

migen_litex_tutorials

vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

kintex-7-stlv7325t-board-files

Pico-PIO-USB

USB host/device implementation using PIO of raspberry pi pico (RP2040).

learn-fpga

Learning FPGA, yosys, nextpnr, and RISC-V

AdventOfCode_2018

Repository for Advent of Code 2018 solutions (in Rust)

JSONTestSuite

A comprehensive test suite for RFC 8259 compliant JSON parsers