jetvova / myarch32

Designing a 32-bit CPU from scratch

MyArch32

MyArch32 is a simple, RISC inspired 32-bit CPU architecture designed from the ground up with its own instruction set. It is implemented with SystemVerilog.

• Registers
• Instruction Set
• Conditional Execution
• Instruction Encoding
• Arithmetic Logic Unit

CPU end-to-end test example: Fibonacci Number Generator