jerryz123

onnx-halide

A Halide backend for ONNX

riscv-OpenBLAS

OpenBLAS is an optimized BLAS library based on GotoBLAS2 1.13 BSD version.

hwacha-net

Hwacha Neural Network

DRAMSim2

DRAMSim2: A cycle accurate DRAM simulator

rocket-chip

Rocket Chip Generator

Swan

Swan Benchmark Suite

ariane

Ariane is a 6-stage RISC-V CPU capable of booting Linux

block-inclusivecache-sifive

boom-template

A template for building new projects/platforms using the BOOM core.

chisel3

Chisel 3: A Modern Hardware Design Language

coremark-pro

Containing dozens of real-world and synthetic tests, CoreMark®-PRO (2015) is an industry-standard benchmark that measures the multi-processor performance of central processing units (CPU) and embedded microcrontrollers (MCU)

embench-iot

The main Embench repository

espresso

fa22tapeout-course-dev

firrtl

Flexible Intermediate Representation for RTL

gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

git

Git Source Code Mirror - This is a publish-only repository and all pull requests are ignored. Please follow Documentation/SubmittingPatches procedure for any of your improvements.

Halide

a language for fast, portable data-parallel computation

onnx

Open Neural Network Exchange

onnx-composer

parsec

riscv-gnu-toolchain

GNU toolchain for RISC-V, including GCC

riscv-isa-manual

RISC-V Instruction Set Manual

riscv-isa-sim

Spike, a RISC-V ISA Simulator

riscv-pk

RISC-V Proxy Kernel

riscv-test-env

riscv-tests

riscv-vector-tests

The missing test suite for RISC-V V extension.

sifive-blocks

Common RTL blocks used in SiFive's projects

test-chipyard