jaesparza / MScThesis

My M.Sc. thesis: "A VMD-RT Methodology for the Hw/Sw Co-Design of Embedded Systems". The repository hosts VDM++, VDM-RT and UML models as well as the full thesis.

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My M.Sc. thesis: "A VMD-RT Methodology for the Hw/Sw Co-Design of Embedded Systems". The repository hosts VDM++, VDM-RT and UML models as well as the full thesis.


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