jackiexiuyi

Cores-SweRV

SweRV EH1 core

picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

amiga2000-gfxcard

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

e200_opensource

The Ultra-Low Power RISC Core

spi-slave

SPI Slave for FPGA in Verilog and VHDL

HDMI-to-FPGA-to-APA102-Pixels

Final Project written in Lucid (verilog) for the Mojo FPGA development board. Reads pixels from HDMI and sends pixel data to 22,000 APA102 LEDs over SPI.

hw

RTL, Cmodel, and testbench for NVDLA

riscvv

an open source uvm verification platform for e200 (riscv)

axi_spi_slave

SPI_SLAVE_Verilog

SPI_SLAVE using verilog

vSPI

Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter