Integrated Circuits Lab @ DUTH's repositories
RISC-V-Vector
Vector processor for RISC-V vector ISA
FusedGCN4HLS
Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
Fast-Float4HLS
Fast Floating Point Operators for High Level Synthesis
shared-buffer-hw
A multi-queue buffer with dynamic buffer space allocation and its Formal Verification TB
Data-Clustering-HLS-Lib
A C++ library of data clustering algorithms for High-Level Synthesis
ApproximatePrefix
Synthesis of Approximate Parallel Prefix Adders
CompArchCourseDUTH
Material related to the Computer Architecture course at ECE, DUTH
Language:C++MIT000